Technologies
In addition to commercially available software and hardware, Bedford Signals Corporation has internally developed resources that include Verilog DSP modules, and C/C++ simulation code that can be leveraged to perform future research and development.
Simulation Modules: C or C++ Code
Coordinate Transformations Between Three Different Systems WGS 84 (latitude, longitude, altitude) Earth Center Earth Fixed (x, y, z) Local (east, north, up) Antenna Arrays Carrier and Modulation Delay and Doppler From Transmitter Antenna Element to Receiver Antenna Element (patent pending) Analog Processing Noise Figure Nonlinear Models Local Oscillator and Mixer Models RF and IF IIR Filter Models Automatic Gain Control ADC Quantization GPS Satellites Satellite Position and Velocity from Orbit Data Carrier and Code Doppler C/A and P Code Generators Data Frames GPS Receivers Platform Position, Velocity, and Acceleration Platform Orientation and Angular Velocity Code (C/A and P) and Carrier Tracking Loops with Bit Detection Jammers CW, Swept Frequency, Gaussian, Pulsed Signal Processing Math Available in Fortran and C -using Basic Linear Algebra Subprograms (BLAS), and the Linear Algebra Package (LAPACK) Correlation Matrix Generation from Samples Simultaneous Linear Equations with Multiple Solutions Eigenvalue and Eigenvector Calculation Multidimensional FFT
Verilog Modules: Targeted for Xilinx and Altera FPGAs
Arbitrary Waveform Generation Implements Our Proprietary High Fidelity Algorithm for Multiple Source Multiple Destination Signal Generation (patent pending) Host DSP interface to Excercise Algorithm Control Filtering Frequency Hopping Notch Filter Wide and Narrow Bandwidth Cancellers Digital Demodulation Ultra High Bandwidth DSP (500 MSPS in an FPGA) Multiplexing and Demultiplexing Signal Data Buses for A/D and D/A Interfaces Discrete Fourier Transform for Signal Decomposition Complex Multiply and Accumulate for Temporal and Spatial Filtering